Pixel Offset Voltage on a CMOS Liquid Crystal on Silicon Microdisplay
EMSL Project ID
2626
Abstract
Background: Liquid Crystal on Silicon (LCoS) Microdisplays have the potential to displace CRT based HDTV units in the marketplace due to their high resolution and low cost achieved from leveraging standard CMOS semiconductor infrastructure. A key performance metric of the CMOS microdisplay design and HDTV application is the Pixel Offset Voltage. Objective: The Pixel Offset Voltage is a result of the CMOS microdisplay design and can degrade the performance of the final HDTV product. Pixel Offset Voltage has been simulated using integrated circuit design tools. The purpose of this work is to confirm simulation results by measuring the Pixel Offset Voltage using Electric Force Microscopy.
Project Details
Project type
Exploratory Research
Start Date
2002-08-27
End Date
2002-11-11
Status
Closed
Released Data Link
Team
Principal Investigator
Team Members